Design-Reuse

The Challenges and Benefits of Analog/Mixed-Signal and RF System Verification above the Transistor Level

Abstract— Today’s on-chip Analog/Mixed-Signal and RF (A/RF) systems have reached a limit of size and complexity where transistor-level SPICE and FastSPICE simulation approaches cannot deliver a ...
Nature

Analog Circuit Design Using MOS Transistors

Analog circuit design using MOS transistors represents a dynamic and rapidly evolving field that is integral to modern electronics. Exploiting the inherent advantages of MOS technology—such as ...
Semiconductor Engineering

Transistor-Level Verification Returns

Technologies that had become specialist tools are moving back into mainstream usage; shift left is not just about doing things earlier in the flow. A few decades ago, all designers did ...
EDN

Solido Design Automation Launches Industry’s First Extensible Process Variation Solution for Transistor-Level Designers

San Jose, Calif. – Jan. 22, 2009 – Solido Design Automation, a leading developer of process variation solutions for transistor-level design of analog/mixed-signal, custom digital and memory integrated ...
Business Wire

Magma Acquires ACAD, Introduces FineSim Pro Circuit Simulator; Full-Chip, Tri-Mode Circuit Simulator Enables Simulation of Entire Mixed-Signal SoCs at Transistor Level

SANTA CLARA, Calif.--(BUSINESS WIRE)--July 24, 2006--Magma(R) Design Automation Inc. (Nasdaq:LAVA), a provider of semiconductor design software, today announced the availability of FineSim(R) Pro, the ...
Design-Reuse

How Verilog-AMS accelerates transistor modeling

Before circuit design can begin on any advanced semiconductor manufacturing process, the electrical behavior of the devices — transistors, diodes, resistors — must be described accurately in so-called ...
Semiconductor Engineering

Automated Analog Design Constraint Checking

Analog integrated circuits (ICs) are used to control and regulate conditions such as temperature, speed, sound, and electrical current. In analog ICs, voltage and current vary continuously at ...
Electronic Design

Identifying transistor-level yield limiters in the FinFET era

As the digital semiconductor manufacturing process moves into the FinFET era, more and more front-end-of-line (FEOL) defects are observed due to extremely small feature size and complex manufacturing ...
Purdue University

New transistor design disguises key computer chip hardware from hackers

WEST LAFAYETTE, Ind. — A hacker can reproduce a circuit on a chip by discovering what key transistors are doing in a circuit – but not if the transistor “type” is undetectable. Purdue University ...
Electronic Design

IBIS Modeling (Part 3): How to Achieve a Quality Level 3 IBIS Model via Bench Measurement

The different IBIS quality levels. The steps in the IBIS bench measurement procedure. Process for Quality Level 2a and Level 2b validation. The Input/Output Buffer Information Specification (IBIS) is ...
EDN

Two-transistor circuit replaces IC

Linear Technology's recently introduced LTC4300 chip buffers I 2 C clock and data lines to and from a hot-swappable card. This task is difficult because the IC must work bidirectionally, meaning that ...
Wired

Scientists Create First Memristor: Missing Fourth Electronic Circuit Element

Researchers at HP Labs have built the first working prototypes of an important new electronic component that may lead to instant-on PCs as well as analog computers that process information the way the ...