GitHub

CMOS-XOR-Gate-Design-using-Cadence-Virtuoso

I’m really glad to share that, this is my fifth project on Cadence Virtuoso. I am designing here a 2-input CMOS XOR Gate Design by 4 CMOS NAND Gate, with it's Layout using Cadence Virtuoso. CMOS XOR ...
GitHub

Design of Two Input NAND Gate Using CMOS Technology

This repository presents the design of Two Input NAND Gate implemented using Synopsis Custom Compiler. The purpose of this Hackathon is to implement the proposed design in 28 nm PDK (Process Design ...
IEEE

Design of 2T XOR gate based full adder using GDI technique

Abstract: Full Adder is one of the fastest adder used in the complex data processing to perform fast arithmetic operations. The main aim of this paper is a design of 2T XOR gate based full adder using ...
Europe PMC

Optimized Design of an All-Optical XOR Gate with High Contrast Ratio and Ultra-Compact Dimensions

In this work, an optimized structure of an XOR gate working in the optical domain is put for- ward to achieve high contrast ratio and extremely compact dimensions using a photonic crystal platform.
Europe PMC

Design and characteristic analysis of an all-optical AND, XOR, and XNOR Y-shaped MIM waveguide for high-speed information processing.

All-optical logic gates are exceptionally suited for Boolean ultrahigh-speed operation and logical computing. This study presents a plasmonic model that uses a Y-shaped metal-insulator-metal waveguide ...
Scientific Research Publishing

3 Transistors XNOR/XOR Gates

XNOR/XOR gates have been presented. Supply voltage has been varied from [1.8 - 1.2] V in proposed de- signs. In first method, the VCO design using three XNOR delay cells shows frequency variation of ...