// clk, W_En, W_Addr, S_Addr, R_Addr, R, S, WR regfile256 rg256(W_Clk, V_W_En, V_W_Addr, V_S_Addr, V_R_Addr, V_REG_OUT, S_Out, V_ALU_OUT); // R, S, Alu_Op, Y, V_ALU ...
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