GitHub

2-Bit Comparator Using Logic Gates

This is a simple project where I built and simulated a 2-bit digital comparator using only basic logic gates in Logisim Evolution. Instead of using the built-in comparator blocks, I created the logic ...
IEEE

FinFET-Premised 1-Bit Comparator Design Using CPTL and DCVSPG Techniques

Abstract: For the efficient design of digital circuits many digital designing techniques have been characterized by Pass Transistor Logic family. Pass transistor-based techniques prefer N-channel ...
IEEE

Low Power - High Speed Magnitude Comparator Circuit Using 12 CNFETs

Abstract: In VLSI domain there is an unending demand for low power, high speed and smaller chip area based circuits. Under these constraints, 1-bit magnitude comparator circuit (1B-MCC) is proposed ...
FOX31 Denver

Linear - Comparators: A Linear Phase Comparator Digital Phase-locked Loop Circuit

A comparator is an electronic component that outputs different voltage results at the output by comparing the magnitude of the current or voltage at the two inputs. This article describes the ...
EDN

Comparator-based buffer using a VVCCS

Editor’s note: PhD candidate, Seyyed Hossein Pishgar approached me with this paper, which I believe has some unique and creative circuitry and architectures. I have ...
GitHub

2-bit_Comparator.log

Start Time: Sat Jun 15 15:41:01 2024 vx1: Removing PWL point (1.4e-07,0) vx3: Removing PWL point (5e-08,0) Warning: Pd = 0 is less than W. Warning: Ps = 0 is less than W. Warning: Pd = 0 is less than ...