If the polynomial used is a primitive, the output random state is up to 2 n - 1 state. This paper presented the designed, developed, and implemented 4, 8, 16, and 32 bit reversible LFSRs in FPGAs by ...

This paper focuses on the implementation and simulation of 4-bit, 8-bit and 16-bit carry look-ahead adder based on Verilog code and compared for their performance in Xilinx.