Design-Reuse

Synopsys Introduces the Industry's First Verification IPs for Arm AMBA 5 AXI-J and APB-E

Arm recently announced the availability of the next iteration of the Arm® AMBA® 5 AXI and APB – AXI Issue J (AXI-J) and APB issue E (APB-E). These new specifications introduce several exciting ...
Design-Reuse

Attacking the Verification Challenges: Applying Next Generation Verification IP to Bus Protocol-based Designs

This paper illustrates the challenges facing design and verification engineers developing next generation products and systems. Increasing design size and complexity are forcing a transformation of ...
EDN

SmartDV Ships First Design and Verification IP for MIPI RFFE v3.0 Specification

Users take delivery on new SmartDV IP as MIPI Alliance unveils latest specification. SmartDV Technologies is the first vendor to deliver Design and Verification intellectual property (IP) supporting ...
New Electronics

Questa Verification IP solution support for new CXL 3.0 protocol

Siemens Digital Industries Software has said that its simulator-independent Questa Verification IP solution now supports the new Compute Express Link (CXL) 3.0 protocol for high-performance computing ...