Optional software plug-ins are available or in development for a range of non-JTAG ISP devices, which includes Altera EPCS and Xilinx configuration SPROMs, Microchip PIC, Atmel AVR plus other ...

[Minifloat] followed Atmel’s ISP app note, and extended some of the code written for a different programmer to get things up and running.

The ISP does have a downside – fuses. Set your fuses wrong, and without a High Voltage Serial Programmer, your chip is bricked.

The FPGAs use a standard two-wire programming scheme to download FPGA data, enabling ISP while reducing I/O count and complexity. The FPGA configuration speed is rated at 30MHz and significantly ...