GitHub

HanaEldemery/4-Bit-Adder-with-BCD-Display-using-VHDL-and-FPGA

I designed a 4-bit adder using the DE10-lite FPGA board. The core of this project was to implement an adder circuit that could handle 4-bit binary numbers. To achieve this, I utilized 8 switches on ...
GitHub

# 4-Bit BCD Adder using 7-Segment Display

We have designed a 4-Bit BCD Adder using the 7-Segment display in Proteus 8.0 Professional. - It takes the two 4-Bit numbers preferably BCD (0-9) and displays the summation of inputs using 7-Segment ...
IEEE

A modified high speed and less area BCD adder architecture using Mirror adder

Abstract: In number system, BCD numbers are well-known for representing numbers in four bit decimal format. Many circuits are designed and developed till today to work with the BCD numbers. In any ...
Design News

Implementing a 1-Digit BCD 8421 Adder, Part 2

In Part 1 of this two-part binary coded decimal (BCD) extravaganza, we introduced a bunch of bodacious concepts, including the binary (base-2) number system, binary logic, binary computers, and bits, ...