IEEE

Code Converters Based on a Dynamic Optical RAM for Information System Facilities

Abstract: In this paper, the authors propose a new dynamic optical RAM based on a fiber-optic line. This device significantly increases the speed of information flows by reducing the time required to ...
IEEE

FPGA Implementation of Code Converters of Decimal Digits from BCD Codes to Seven-Segment Display Code

Abstract: A laboratory board built on the base of Spartan-6 FPGA Family, created at the University of Ruse, is described in the paper. It will be applied in the learning the courses of “Digital ...
EDN

FPGA firmware example of how to interface Altera FPGAs to high-speed LVDS-interface data converters

This reference design and the associated example Verilog code can be used as a starting point for interfacing Altera FPGAs to Texas Instruments' high-speed LVDS-interface analog-to-digital converters ...