EDN

A novel approach for simulation of digital circuits using levelization

Verification had always been an important part of SOC design flow. As SOCs are getting more and more complex, so is their verification. Verification of a design involves simulating the all possible ...
IEEE

Design and Implementation of Low Power NAND Gate Based Combinational Circuits Using FinFET Technique

Abstract: Low-power design has seen significant progress as a result of the rising demand for power conservation in very large-scale integration (VLSI). Advancements in this field have been driven by ...
GitHub

This repository contains four laboratory assignments covering combinational circuits, sequential logic with Verilog, FPGA implementation, and memory systems.

Simplify and implement a circuit with inputs A1, A0, B1, B0 and outputs X, Y, Z using only 74LS ICs in Logisim. Learn Boolean algebra simplification and basic gate usage. Lab 2: Multiplexers, Decoders ...
GitHub

Digital Logic Gate Designs

This project contains a collection of simple digital logic circuit designs represented both as Boolean equations and Logisim .dig circuit files. Each part demonstrates a different logic function built ...
IEEE

Combinational circuit design using evolutionary algorithms

Abstract: This paper explores the possibility of enhancing the performance of genetic algorithms (GA) in automating the design of combinational circuits by multi-objective optimization using problem ...