EDN

Optimizing High Performance CPUs, GPUs and DSPs? Use logic and memory IP—Part II

In Part I of this two-article series we described how the combination of logic libraries and embedded memories within an EDA design flow can be used to optimize area in CPU, GPU or DSP cores. In Part ...
EDN

Optimizing high-performance CPUs, GPUs and DSPs? Use logic and memory IP—Part I

Mobile communications, multimedia and consumer systems-on-chip (SoCs) must achieve the highest performance while consuming the minimal amount of energy to achieve longer battery life and/or fit into ...