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bvsrvaibhav/Viterbi-Decoder-213

This repository contains a Verilog implementation of a hard-decision Viterbi decoder for a convolutional code. The design demonstrates how the classical blocks of a Viterbi decoder can be realized in ...
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Releases: Mangalje/Design-of-Encoder-Decoder-module-for-Hamming-code-generation-using-Verilog-HDL

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Design-Reuse

Reed Solomon Encoder and Decoder FEC IP Core From Global IP Core

December 20, 2023 - Global IP Core Sales - The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the input message in order to form ...
Design-Reuse

Salamander Error Correction announces 1 Gbps Viterbi decoder

San Diego, Calif. -- August 22, 2007 -- Salamander Error Correction, a division of Komodo Industries, Inc, announced today the availability of the SALxx304d, a very ...