No discussion on FPGA design is complete without addressing the issues associated with transferring signals that are not synchronized to the clock into clocked logic. While this should be a digital ...

One of the most important steps in the design process is to identify how many different clocks to use and how to route them. This article tells you how to use routing resources efficiently.

A critical issue with any Field Programmable Gate Array (FPGA) design is Simultaneous Switching Output (SSO) noise. SSO noise, also known as ground bounce, is a result of large instantaneous changes ...

In FPGA design, where timing is everything, there are tips and tricks to help designers set up clocks, correctly set timing constraints and then tune parameters of the FPGA, write Angela Sutton and ...

Different types of interface standards used in LVDS. Recommendations for interfacing FPGAs to ADCs. Methods of troubleshooting when connecting to the AD9268 ADC. 1. Multiple interface possibilities ...

Part of the Planning Process in DO-254 is knowing the appropriate FPGA tools and capabilities that you need and intend to use for your FPGA design. Particularly if your FPGA device operates with ...

In considering the design option for DSP vs. FPGA it is helpful to compare both architectures in a FIR filter application, writes Reg Zatrepalek One of the most widely used digital signal-processing ...

[Mike Field] just finished implementing SPDIF generation on an FPGA. SPDIF is an industry standard for transmitting digital audio signals; the acronym stands for Sony/Philips Digital Interconnect ...

This tutorial shows you how to create the hardware equivalent of “Hello World”: a blinking LED. This is a simple exercise to get you started using the Intel® Quartus® software for FPGA development.