Elektor Magazine

Mastering FPGA Chip Design with Kevin Hubbard, Elektor Engineering Insights #56

Learn real-world strategies about FPGA Chip Design, Join Elektor Engineering Insights on Sept 24 at 16:00 CEST with Kevin ...
Design-Reuse

Automatic C-to-VHDL testbench generation shortens FPGA development time

Verifying behavior early and often has become critical with FPGAs. Newer generations of FPGAs have gate counts that rival the largest custom ASICs of five years ago. This fact, coupled with the broad ...
Design-Reuse

Xilinx Launches First High-Density, Rad-Hard Reconfigurable FPGA For Space Applications

SAN JOSE, Calif., July 19, 2010 --Xilinx, Inc. (Nasdaq: XLNX) today launched the industry's first high-density, rad-hard reconfigurable FPGA for withstanding radiation environments encountered by ...
Network World

Altera targets low-latency AI edge applications with new FPGA products

“Having an AI infused fabric that allows you to configure that FPGA with the precise algorithms and capabilities and resources of the underlying platform to deliver on those AI tasks is really one of ...
Electronic Design

Small-Form-Factor FPGA Destined for Low-Power Apps

How Agilex 3 enhances AI designs. How Altera addresses AI, security, and longevity. How 12.5-Gb/s transceivers help improve FPGA designs. The Agilex 3 FPGA family almost doubles the performance of ...
Electronic Design

New FPGA Family Fits Cost- and Power-Optimized Edge Apps

Where Agilex 3 fits in Altera’s lineup. The development software that supports Agilex 3. Altera’s spinoff from Intel coincided with its release of the Agilex 3 FPGA family. This fills out the low end ...
Business Wire

Xilinx ‘Lifts Off’ with Launch of Industry’s First 20nm Space-Grade FPGA for Satellite and Space Applications

SAN JOSE, Calif.--(BUSINESS WIRE)--Xilinx, Inc. (NASDAQ: XLNX), the leader in adaptive and intelligent computing, today announced the industry’s first 20-nanometer (nm) space-grade FPGA, delivering ...