Design-Reuse

A Low Complexity Parallel Architecture of Turbo Decoder Based on QPP Interleaver for 3GPP-LTE/LTE-A

This paper propose an improved method called the modified warm-up-free parallel window(PW) MAP decoding schemes to implement highly-parallel Turbo decoder architecture based on the QPP(Quadratic ...
Design-Reuse

Parallel Turbo decoder for LTE and LTE-A

This block is suitable for 3GPP Long Term Evolution (LTE) applications compatible with the 3GPP Technical Specification. The LTE Release-8 Turbo code achieves near optimal error-correcting performance ...
EDN

Lattice expands wireless solutions with 3FPP-LTE CTC decoder IP core

The folks at Lattice have announced the availability of a 3GPP-Long-Term Evolution (LTE) Convolutional Turbo Code (CTC) Decoder intellectual property (IP) core from TurboConcept, a member of the ...
IEEE

Implementation of a high-speed parallel Turbo decoder for 3GPP LTE terminals

Abstract: This paper presents a parameterized parallel Turbo decoder for 3GPP LTE terminals. To support the high peak data-rate defined in the forthcoming 3GPP LTE standard, turbo decoder with a ...
IEEE

A 1Gbps LTE-advanced turbo-decoder ASIC in 65nm CMOS

Abstract: This paper presents a turbo-decoder ASIC for 3GPP LTE-Advanced supporting all specified code rates and block sizes. The highly parallelized architecture employs 16 SISO decoders with an ...