Semiconductor Engineering

What’s Next In System-Level Design?

Experts At The Table: EDA has undergone numerous workflow changes over time. Different skill sets have come into play over the years, and at times this changed the definition of what it means to ...
Semiconductor Engineering

System-Level Design For 1.6 Tbps Interoperability In AI Data Centers

The rapid escalation of AI/ML workloads—driven by increasingly large language models—is reshaping high-performance computing and AI data center architectures. Real-time inference and large-scale ...
Electronic Design

Advanced Rectifier Overcomes Challenges of Harvesting Low-Level RF

Why harvesting low-level RF is difficult. How a new spin-rectifier implementation addresses a major limitation. The results achieved with the new component. Energy harvesting has lots of positive ...
Design-Reuse

Mirabilis Design Signs OEM Agreement with Cadence to Deliver VisualSim for System-Level Modeling and Performance Optimization

Santa Clara, CA — June 11 2025 – Mirabilis Design Inc. today announced an OEM agreement with Cadence Design Systems, Inc. to offer VisualSim Architect as part of Cadence’s system design portfolio.

Advantest Expands 7038 System-Level Test Platform with Right-Sized Single Test Rack Solution for High-Volume Manufacturing

Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) today announced its 7038 Single Test Rack (STR) system-level test (SLT) and burn-in test (BI) solution. The 7038 STR ...