Hackaday

MIPI CSI-2 Implementation In FPGAs

[Adam Taylor] always has interesting FPGA posts and his latest is no exception. He wanted to use a Zynq for image processing. Makes sense. You can do the high-speed parallel parts in the FPGA fabric ...
Hackaday

Xilinx Makes MIPI CSI And DSI Controller IP Blocks Free To Use With Vivado

If you want to use a display or camera with an FPGA, you will often end up with a MIPI-based solution. As of the Xilinx Vivado 2020.1 release, the MIPI DSI (display serial interface) and CSI (camera ...
Design-Reuse

MIPI in FPGAs for mobile-influenced devices

A new wave of applications for mobile-influenced devices, using technology initially designed for mobile devices, demand high-resolution, high-frame-rate streaming data from vision sensors, especially ...
Electronic Design

FPGA Bridges MIPI and More

Acting as a bridge between a peripheral’s interface and a host, the CrossLinkPlus FPGA is equipped to handle interface conversion and MIPI virtual channels. Lattice Semiconductor’s CrossLinkPlus is ...
Business Wire

Mixel MIPI C-PHY/D-PHY Combo IP Integrated into Hercules Microelectronics HME-H3 FPGA

Mixel’s MIPI PHY IP integrated into the HME-H3 FPGA, the industry’s first FPGA to support MIPI C-PHY v2.0 SAN JOSE, Calif.--(BUSINESS WIRE)--Mixel ®, Inc. (Mixel), a leading provider of mixed-signal ...
Design-Reuse

Complete FPGA-Based MIPI Video Demonstration System Now Available

July 9, 2013 — Altima Corporation, Northwest Logic, and Meticom announce the immediate availability of a complete MIPI video demonstration system using Altera’s Cyclone IV and V FPGAs. This ...
New Electronics

Arasan announces MIPI DSI IP for FPGA

Arasan has released a new version of its MIPI DSI IP that's compliant with the DSI-2 v1.0 Specifications supporting C-PHY v2.0 speeds of up to 54.72Gbps operating at 8 Gbps (for 1channel) for FPGA ...
Business Wire

Mixel’s MIPI D-PHY IP Integrated into the Lattice CrossLink-NX FPGA

SAN JOSE, Calif.--(BUSINESS WIRE)--Mixel ®, a leading provider of mixed-signal intellectual property (IP), announced today that Mixel’s MIPI ® IP solution has been successfully integrated into Lattice ...
PR Newswire

Arasan announces MIPI CSI IP for FPGA supporting full C-PHY 2.0 speeds

Arasan announces the immediate availability of its MIPI CSI IP supporting C-PHY v2.0 speeds of up to 54.72Gbps (when operating up to 8 Gsps with all 3 channels) for FPGA designs SAN JOSE, Calif., Nov.
Nasdaq

Lattice FPGA Brings High-Performance MIPI Bridging to Ambarella’s CVflow Architecture for Automotive and Machine Vision Applications

HILLSBORO, Ore.--(BUSINESS WIRE)-- Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced that Ambarella, Inc. (NASDAQ: AMBA) selected the Lattice ECP5™ ...
EDN

FPGA-based MIPI interfaces target video displays and cameras

Developed with Xilinx' Premier Alliance members Northwest Logic and Xylon, the low cost Xilinx FPGA-based MIPI interface IP is optimized for cost sensitive video displays and cameras. The company’s ...