Semiconductor Engineering

Heterogeneous Multi-Core HW Architectures With Fine-Grained Scheduling of Layer-Fused DNNs

A technical paper titled “Towards Heterogeneous Multi-core Accelerators Exploiting Fine-grained Scheduling of Layer-Fused Deep Neural Networks” was published by researchers at KU Leuven and TU Munich.

Ali Tongyi Team Open Sources Qwen3-Next: Hybrid Architecture + Extreme Sparse MoE, Boosting Inference Cost-Effectiveness

The Ali Tongyi team recently announced the official launch and open-sourcing of the next-generation large language model architecture Qwen3-Next, marking a new development stage for large model ...
Yahoo Finance

MicroCloud Hologram Inc. Develops a Noise-Resistant Deep Quantum Neural Network (DQNN) Architecture to Optimize Training Efficiency for Quantum Learning Tasks

SHENZHEN, China, June 10, 2025 (GLOBE NEWSWIRE) -- MicroCloud Hologram Inc. (NASDAQ: HOLO), (“HOLO” or the "Company"), a technology service provider, announced the development of a noise-resistant ...
pv magazine International

PV string fault detection technique based on multi-layer neural network

Scientists in India have proposed using a multilayer neural network to find line-to-ground, line-to-line, and bypass diode faults in PV module strings. They tested the new approach on a 22.5 kW solar ...