Nature

Low-Power CMOS Flip-Flop Design and Power Management

Recent advances in Complementary Metal-Oxide-Semiconductor (CMOS) technology have underscored the importance of power-efficient flip-flop designs for modern electronic systems. Over recent years, ...
Nature

Low Power Design in CMOS and FinFET Logic Circuits

Low power design has become a cornerstone of modern integrated circuit development, driven by energy efficiency demands and the challenges of scaling in nanometre technologies. Innovations in ...
EDN

Very High-Speed CMOS Logic for Next-Generation Designs

This document is a brochure of NXP’s CMOS logic devices for next generation designs. The NXP VHC/T & XC7 logic provides very high speed and low power over an extended temperature range suitable for a ...
Electronics360

ROHM develops ultra-compact CMOS op amp: Delivering lowest operating circuit current

ROHM’s ultra-compact complementary metal–oxide–semiconductor (CMOS) operational amplifier (op amp) TLR1901GXZ achieves the ...
Design-Reuse

How to reduce power consumption in CPLD designs with power supply cycling

It is increasingly common for Complex Programmable Logic Devices (CPLDs) to be used in systems with stringent power budgets. Examples include smart phones, handheld instrumentation, video recording ...
EDN

Low Power Mobile CMOS DDR SDRAMS

Alliance Memory announced the release of its new line of high-speed mobile CMOS double data rate synchronous DRAMs (DDR SDRAM) intended to increase efficiency and extend battery life in compact ...
Electronics Weekly

Estimator tool cuts power consumption in embedded designs

Dynamic power consumption reduction in embedded systems is achieved says Tensilica with what the chip firm calls an energy estimator for use with its Xtensa configurable and Diamond Standard ...
Design-Reuse

SiTune unveils Ultra low power Mobile Analog CMOS TV Tuner for power sensitive devices

Silicon Valley (San Jose), California -- January 19, 2010-- SiTune Corporation, a leader in CMOS radio-frequency (RF) and mixed signal solutions for broadcast television, announced its latest ...
Yahoo Finance

Cadence Accelerates Development of Billion-Gate AI Designs with Innovative Power Analysis Technology Built on NVIDIA

New Cadence Palladium Dynamic Power Analysis App enables designers of AI/ML chips and systems to create more energy-efficient designs and accelerate time to market The massive complexity and ...
Electronic Design

Fixed-Direction Voltage Level Translators Cut Power Consumption and Pin Count

Nexperia’s next-gen smart voltage translators feature glitch-free auto-detection, wide voltage range, and low-quiescent power consumption. A novel family of advanced fixed-direction voltage level ...
Yahoo Finance

CDNS, NVDA Team Up to Advance Billion-Gate AI Design Power Analysis

Cadence Design Systems (CDNS) and NVIDIA Corporation (NVDA) have achieved a breakthrough with hardware-accelerated dynamic power analysis for billion-gate artificial intelligence (AI) designs, ...