The DS89C4x0 single-cycle 8051 processors come with flash memories up to 64 kbytes. They can be programmed by an application. The devices also include two full-duplex UARTs, ...

The MIPS SIMD architecture (MSA) module allows efficient parallel processing of vector operations. This functionality is of growing importance across a range of applications. For consumer electronics ...

TAIPEI, Taiwan — Highlighting the increasing demands on consumer devices, especially portable systems, MIPS Technologies Inc. and ARM Ltd. are ratcheting up their efforts to persuade designers here to ...

TAIPEI, Taiwan — Highlighting the increasing demands on consumer devices, especially portable systems, MIPS Technologies Inc. and ARM Ltd. are ratcheting up their efforts to persuade designers here to ...

MIPS has brought up the idea of having the chips operated in a multi-threading CPU environment to address these design challenges.

The British chip designer has increased its offer for MIPS's operating business and selected intellectual property to $80m, so as to ward off competition from CEVA.

As MIPS’ Chief Architect, Mr. Burgess will be responsible for technology architecture and development of all new key roadmap product designs at MIPS.