“Golden” RTL code has been seen as a holy grail of IC design for many years. It promises to deliver code that is reusable in future designs. However, golden RTL is very difficult to achieve. Too many ...

While most of the ASIC industry is focused on solving timing and congestion problems at the netlist level, LSI Logic has developed and deployed an innovative methodology to resolve these physical ...

The workshop“RTL Design and Synthesis using Sky130” is a hands-on learning series by VSD-IAT focused on Verilog RTL design, simulation, synthesis, and digital circuit optimization. Designed especially ...

In the real world of electronic product design, time-to-market can have a large impact on success. To facilitate production speed, RTL from existing projects is often recycled for use in the new ...

The complexity of compute-intensive applications is driving the move to system design at the algorithmic level. With the release of the Catapult C synthesis tool ...

Axis Systems has developed an emulation and verification tool specifically aimed at users of intellectual property. RCC Model Compiler can link together pre-compiled blocks of RTL code. This allows ...

It’s critical that team members use the same set of rules to check their code against coding standards and best practices—while they’re writing it! Many of today's large, complex designs can contain ...