Semiconductor Engineering

Next-Generation Distributed Static Timing Analysis On The Cloud

Ever-growing chip size and complexity put pressure on every step and every electronic design automation (EDA) tool in the development flow. More decisions must be made at the architectural stage, ...
Embedded

Static timing analysis: bridging the gap between simulation and silicon

Static Timing Analysis (STA) not only acts as a connecting link between backend and frontend design activities, but more importantly helps in bridging the gap between simulation and silicon. STA is ...
EDN

Static timing analysis taken to RT level

San Mateo, Calif. – InTime Software Inc. will unveil a register-transfer-level timing tool this week intended to help IC designers develop timing-accurate RTL code before they move to synthesis, ...