This repository gives the implementation of proof-of-concept code used to evaluate a TLB-based covert channel on NVIDIA GPUs. We also provide the files used to reverse-engineer the TLB hierarchy of ...

The RISCV TLB model throws an illegal address exception if a program attempts to access an address in the upper half of the physical address space (any address with the MSB set). This is not ...

Abstract: This paper proposes a novel TLB architecture - Deterministic Translation Lookaside Buffer - to reduce TLB misses, energy consumption and effective per access time. DTLB offers tighter upper ...

Abstract: We present a selective filter-bank translation lookaside buffer (TLB) system with low power consumption for embedded processors. The proposed TLB is constructed as multiple banks with a ...