Design-Reuse

Generating multiple clock frequencies using Specman "real" feature in mixed (Analog/Digital) design environments

Using our “Specman agent approach for the Mixed Verification†along with exploiting “real†feature of Specman version 8.2, we can introduce directed/constrained randomization to the frequencies ...
Design-Reuse

Using Tcl to create a virtual component in Verilog

It has long been a goal to put realistic prototypes or models into system developer's hands as soon as possible. This has been accomplished with FPGAs, C language models and sometimes co-simulation ...