EDN

VHDL-AMS simulation for battery chargers

The Maxim 2003, and a parameterized NiCd battery model, were created using the VeriBest behavioural modelling language DIABLO. Although many SPICE simulators nowadays provide some high-level modelling ...
EDN

System Compiler Adds Support for Mixed-Language Simulation with Verilog and VHDL

San Jose, CA – February 20, 2001 – C Level Design, Inc. today announced a fully automated Verilog Programming Language Interface (PLI) and VHDL Foreign Language Interface (FLI) code generators to ...
GitHub

16-bit-Carry-Save-Multiplier-VHDL-Implementation

This repository contains the VHDL implementation of a 16-bit unsigned binary multiplier based on the "pen-and-paper" multiplication method, optimized using the carry-save technique. The project ...
IEEE

VHDL-AMS behavioral modeling and simulation of a /spl Pi//4 DQPSK transceiver system

Abstract: This work describes a methodology for top-down design, modeling, and simulation of complete /spl Pi//4 DQPSK system using hardware description language VHDL-AMS. Two system implementations ...
IEEE

Analyzing and simulation of MEMS in VHDL-AMS based on reduced-order FE models

Abstract: This paper deals with the computer-aided generation of reduced-order macromodels (ROMs) for system level simulation using VHDL-AMS. The focus is thereby set on the application of ROMs in ...
Design-Reuse

Optimization Methodologies for Cycle-Accurate SystemC Models Converted from RTL VHDL

IP design-houses are hard-pressed by their customers to provide SystemC models of their portfolio IPs, despite already existing VHDL views. VHDL IPs can be translated to SystemC, ensuring correctness, ...
Hackaday

Simulating VHDL Of An AVR8 Soft Processor

Okay, now we’re beginning to feel a bit like [Alice]. This tutorial shows you how to simulate VHDL code. This code is intended to run on an FPGA and includes a software-only version of the AVR 8-bit ...
TechRepublic

Design and Simulation of 8255 Programmable Peripheral Interface Adapter Using VHDL

The 8255A Programmable Peripheral Interface (PPI) implements a general-purpose I/O interface to connect peripheral equipment to a microcomputer system bus. The core’s functional configuration is ...
Electronic Design

Simulation Tools Speed Design Debug And Verification

Shorter time-to-market cycles and the increasing densities of both programmable logic devices (PLDs) and system-on-a-chip (SoC) ICs have made design simulation an essential part of the development ...
Design-Reuse

Synopsys speeds Verilog, VHDL simulation

MOUNTAIN VIEW, Calif. — Claiming substantial speedups in its Verilog and VHDL simulation products, Synopsys Inc. this week is announcing releases of its VCS Verilog and Scirocco VHDL simulators. The ...
GitHub

Designing and Simulating of Digital Multiplexer

For this project, we selected the DE1-115 FPGA development board from Intel (formerly Altera) as our main hardware platform. The DE1-115 board is built around the Cyclone IV EP4CE115 FPGA chip, ...