Boo_Function.v file is a verilog code for the boolean function synthesized in Altera Quartus and Simulated in Modelsim. Netlist.pdf file shows the netlist generated in Altera Quartus. Simulation.pdf ...

About This repository contains VHDL implementations of basic logic gates (AND, OR, NOT, NAND, NOR, XOR, XNOR). It includes designs and simulations using Quartus II and ModelSim. The project covers ...