GitHub

jrreed83/vhdl_convolutional_encoder_example

To get this to work, you need to link to the libraries. Here's a link on the OSVVM official stire that spells out how to do that: https://osvvm.org/archives/2280. By ...
GitHub

VHDL files to simulate the Aurora 64b66b protocol in Xilinx Vivado

This repository contains two testbenches to compare the behaviour of the original Verilog example design to the translated VHDL example. The example consits of a FRAME_GEN and a FRAME_CHECK entity.
EDN

EDN Access–04.10.97 VHDL and Verilog fundamentals–expressions, operands, and operators

The data objects in VHDL and Verilog form expression operands. Knowing the operand differences between the two HDLs helps you write more efficient chip-design code. Expressions consist of operators ...
IEEE

Moore and Mealy Negative Edge detector A VHDL Example for Finite State Machine

Abstract: In modern societies we are more dependent on computerized tools, they help us to cope with recent modern lives. The automatic machines perform a variety of operations by adapting the changes ...
IEEE

VHDL based circuits design and synthesis on FPGA: A dice game example for education

Abstract: The DSP (Digital Signal Processing) and digital control have many advantages over the analog processing and control. Therefore, with the recent advancements of technology most of the signal ...
Electronic Design

What’s the Difference Between VHDL, Verilog, and SystemVerilog?

Designers of electronic hardware describe the behavior and structure of system and circuit designs using hardware description languages (HDLs)—specialized programming languages commonly known as VHDL, ...
Hackaday

FPGA Snake Game Uses No VHDL At All

We’re really not supposed to start a feature like this; but this hack is awesome. It’s a game of Snake implemented by an FPGA dev board. It uses a 16×16 LED matrix as the display and an SNES ...