Hackaday

Using VHDL To Generate Discrete Logic PCB Designs

VHDL and Verilog are hardware description languages, used to describe and define logic circuits. They’re typically used to design ASICs and to program FPGAs, essentially using software to define ...
GitHub

️ VHDL Projects for Digital Systems Design

This repository contains a series of VHDL projects developed for a course in Digital Systems Design (FPGA/ASIC). The projects cover a wide spectrum of digital logic design, from basic combinational ...
IEEE

Enhancing Alliance VLSI Toolchain by Mixed Gate-level Logic Synthesis

Abstract: Alliance is an open-source CAD tool suite for very large scale integration (VLSI) design, offering a comprehensive set of features including VHDL compiler, simulator, logic synthesis tools, ...
GitHub

Aliflori/VHDL-Digital-Logic-Labs

This repository contains a series of VHDL projects developed for a hands-on digital logic design laboratory course. The labs progress from fundamental combinational and sequential circuits to complex, ...
TechRepublic

Design and Verification of VHDL Code for FPGA Based Slave VME Interface Logic

Versa Module Europa (VME) bus is used in various applications in order to ensure safety and security. VME64x based Real Time Computer (RTC) system with various types of Input /Output (I/O) hardware ...
IEEE

VHDL Implementation For a Fuzzy Logic Controller

Abstract: This paper describes the implementation for a basic fuzzy logic controller in Very High speed integrated-circuit Hardware-Description Language (VHDL). It is not intended as an introduction ...