GitHub

n-Digit BCD Adder (Verilog Project)

Built 1-bit full adder using gates Constructed 4-bit ripple carry adder Designed 1-digit BCD adder Extended to 3-digit BCD adder (n=3) Introduced and detected design ...
GitHub

BCD Adder and Subtractor with 7-Segment Display in Verilog

This project implements a BCD (Binary-Coded Decimal) Adder and Subtractor using Verilog HDL, along with output display logic for 7-segment displays. It includes modules for addition, subtraction, ...
IEEE

Radix-10 multiplier implementation with carry select adder using Verilog

Abstract: Multiplier play important role in various applications and in recent years there is an increase in multiplication applications, thereby raising the need for multiplier that performs faster ...