The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. (March 2018: Link dead. Try the Wayback Machine.) Programmable logic devices are ...

You don’t usually think of simulating Verilog code — usually for an FPGA — as a visual process. You write a test script colloquially known as a test bench and run your simulation. You might get some ...

Altium and Aldec have signed an OEM agreement that adds Aldec's fpga simulation capabilities to Altium Designer. The agreement adds an extra dimension for electronics designers working with fpgas and ...