The T-COR-30 FPGA IP core implements the algorithm of automatic tracking of objects in video and calculation of their pa-rameters for solving guidance and target designation tasks. The IP core ... The ...

This Physical Layer core gives you the ability to simultaneously read and write on every rising and falling edge. QDRII+ is a low-latency SRAM-based standard, used in cache coherent systems, ... This ...

We always marvel at how open-source tools can often outstrip their commercial counterparts. Yosys, the open-source tool for Verilog synthesis, is a good example. Although the Xilinx ISE design suite ...

Vending Machine System on FPGA - Digital Design with Verilog A comprehensive digital design project that models the control logic of a standard vending machine. This implementation focuses on the ...

Real-Time Audio DSP System on a Xilinx Zynq FPGA This project is an end-to-end implementation of a real-time audio processing and transmission system on a Xilinx Zynq-7000 SoC. It captures live audio, ...

Xilinx has announced the availability of ISE Design Suite 13.3 featuring new capabilities for DSP designers to implement bit-accurate single, double and full custom precision floating-point math ...

Abstract: Reducing power consumption is an important challenge in modern computing, especially in embedded and FPGA-based designs. This paper presents the design and implementation of a clock and ...

When you think of developing with FPGAs, you usually think of writing Verilog or VHDL. However, there’s been a relatively recent trend to use C to describe what an FPGA should do and have tools that ...