GitHub

Verilog implementation of a BCD adder along with it's test bench

There was an error while loading. Please reload this page. This project implements a BCD (Binary Coded Decimal) Adder in Verilog along with a testbench. BCD Adder ...
GitHub

# BCD Adder Using Logisim

This repository contains the design and simulation of a BCD (Binary-Coded Decimal) adder circuit using Logisim. BCD is a class of binary encodings of decimal numbers ...
IEEE

Design of optimized reversible Binary and BCD adders

Abstract: Reversible logic has emerged as a possible low cost alternative to conventional logic in terms of speed, power consumption and computing capability. An adder block is a very basic and ...
IEEE

A Novel Carry-Look Ahead Approach to a Unified BCD and Binary Adder/Subtractor

Abstract: Increasing prominence of commercial, financial and Internet-based applications, which process decimal data, there is an increasing interest in providing hardware support for such data. In ...
EDN

Creating A Full Adder Circuit Using NAND Gates

How do you create a full adder using nand gates? A Full-adder circuit adds three one-bit binary numbers (A, B, Cin) and outputs two one-bit binary numbers, a Sum (S) and a carry (Cout). It is usually ...