We often see “logic analyzer” projects which are little more than microcontrollers reading data as fast as they can, sending it to a PC, and then plotting the results. Depending on how fast the ...

Hello, I would like to bring up an issue caused by PLL2 being used. While by itself this is fine, the issue lies in the fact that many peripherals where exact timing is importantl can only use PLL2 ...

It seems ram_internal.c and .h / SDRAM init uses and fully defines PLL2, leaving one with no configurable clocks if using a display. This seems pointless on Portenta, as using HCLK would result in ...