Abstract: This paper proposes a novel digital voltage regulator architecture for System-on-Chip (SoC) applications. The architecture includes an Analog Nested Loop, which improves the regulator's ...
As part of trying to update RDF Fusion to DataFusion 50, we observed a significant performance regression for a query that makes use of a Nested Loop Join.
Abstract: A 2.4-Gb/s and 1.9-fJ/bit true random number generator (TRNG) featuring a novel entropy source is presented. The proposed nested chaotic oscillator (NCO) leverages the chaotic behavior of ...
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