Over the last year we’ve had several posts about the Lattice Semiconductor iCEstick which is shown below. The board looks like an overgrown USB stick with no case, but it is really an FPGA development ...
FPGA Express, Synopsys' first Windows-based tool for programmable-logic design aims at high-density FPGA and complex-PLD (CPLD) chips. The tool uses a Verilog or VHDL design description at the ...
Tim [Mithro] Ansell has a lot to tell you about the current state of open FPGA tooling: 115 slides in 25 minutes if you’re counting. His SymbiFlow project aims to be the GCC of FPGA toolchains: ...
Sunnyvale, Calif. — Version 9.6 of the QuickWorks development tools is now available for the Eclipse II family of FPGAs. These tools include a PowerAware Placer tool , which minimizes dynamic power by ...
San Jose, Calif. - More than a few chip companies have tried their hand at embedding blocks of FPGA logic into otherwise-hardwired ASIC devices. Startup M2000 says it wants to be the first to make a ...
Time-saving verification tools have been added to an advanced tool flow for high-end FPGA design. The flow, a collaboration between Xilinx Inc. of San Jose and Synopsys Inc. of Mountain View, Calif., ...
Altium and Aldec have signed an OEM agreement that adds Aldec's fpga simulation capabilities to Altium Designer. The agreement adds an extra dimension for electronics designers working with fpgas and ...
FPGA start-up, SiliconBlue has chosen Synopsys Synplify Pro FPGA synthesis software as the synthesis tool of choice for its iCE65 family of mobileFPGA devices. As take-up of its SRAM-based FPGAs ...
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